

Patent Engineer
886-2-23415112Assisted a listed IC design company in building its patent management function from the ground up, establishing SOPs for invention disclosure, prosecution workflow, portfolio review, and maintenance fee evaluation, and setting up a management framework for domestic and foreign patent firms.
Assisted a global leader in logic-based Non-Volatile Memory (NVM) semiconductor IP with patent portfolio planning in core technology domains including NVM, OTP, and PUF, handling 100+ patent matters annually in Taiwan, the U.S., China, Europe, and Japan.
Participated in patent litigation for a world-leading LED manufacturer, preparing technical evidence, conducting prior art searches and validity/invalidity analyses, and supporting licensing and negotiation matters.